#!/bin/bash 
# @Author: slp 
# @Date:   2017-08-14 09:49:22 
# @Last Modified by:   slp
# @Last Modified time: 2017-10-27 16:22:23



if [ "$1" != "" ]; then
	TEST=$1
else
	echo "usage: $0 test_elf"
	exit 1
	# TEST=/home/slp/benchs/V8INT/v8int_ldtrh/int_el1s.4k.int_config_mmu_on/v8int_ldtrh.int_el1s.4k.int_config_mmu_on.ELF
	# TEST=/home/slp/benchs/VEC_INT/vec_int_data_esz64_grp_perm_reverse_p_tbl1_pred_patterns64_0/vec_ml.vec_64k.vec_entry_el2.vec_mmu_on.vec_vl_128/vec_int_data_esz64_grp_perm_reverse_p_tbl1_pred_patterns64_0.vec_ml.vec_64k.vec_entry_el2.vec_mmu_on.vec_vl_128.ELF
fi

if [ "$AEM_TARMAC_FILE" != "" ]; then
	TARMAC_FILE=$AEM_TARMAC_FILE
else
	TARMAC_FILE=trace.tarmac
fi


# MODEL_ROOT=/CORE/CAD/arm-dev/ds5/DS-5_v5.27.0/sw/models/bin/
# FASTMODEL_ROOT=/CORE/CAD/arm-dev/fastmodels/fastmodel_r10p3_rel0/FastModelsPortfolio_10.3/

# TRACE_PLUGIN="--plugin ${FASTMODEL_ROOT}/plugins/Linux64_GCC-4.8/TarmacTraceV8.so "
# TRACE_PLUGIN="--plugins /CORE/CAD/arm-dev/fastmodels/fastmodel_r10p3_rel0/FastModelsPortfolio_10.3/plugins/Linux64_GCC-4.9/TarmacTraceV8.so "
TRACE_PLUGIN="$TRACE_PLUGIN -t -C TRACE.tarmac.trace-file=$TARMAC_FILE"

echo $TRACE_PLUGIN

if [ "$NO_TARMAC_TRACE" != "" ]; then
	TRACE_PLUGIN=""
fi

# SVE_PLUGIN="--plugins ${MODEL_ROOT}/ScalableVectorExtension.so"
# SVE_PLUGIN="$SVE_PLUGIN -C SVE.ScalableVectorExtension.enable_at_reset=1 "

export LM_LICENSE_FILE=27330@202.197.154.250
# TEST=image64.elf

source 	/CORE/CAD/tools/gcc/gcc-4.9.4/env.bashrc
# MODEL=/home/slp/tmp/avk/AR100-VA-01001-r4p0-00bet0/tmp/aem/VAL_VAL_AEMv8A
# MODEL=/home/slp/tmp/avk/AR100-VA-01001-r4p0-00bet0/validation/tools/aem/VAL_VAL_AEMv8A
# MODEL=/home/slp/tmp/avk/aem.4.avk.r4p0.b0/VAL_VAL_AEMv8A
MODEL=/CORE/CAD/arm-dev/aem/slk/aem.4.avk.r4p0.beta0/VAL_VAL_AEMv8A

$MODEL  \
$TRACE_PLUGIN \
$SVE_PLUGIN \
 -C elfloader.elf=$TEST  \
 -C cpu.NUM_CORES=0x1 \
 -C cpu.PA_SIZE=0x34 \
 -C counter_addr=0x16200000 \
 -C cpu.ADFSR-AIFSR-implemented=1 \
 -C cpu.branch-predictor-supported-ops=0x2 \
 -C cpu.CCSIDR-L1D_override=0x701fe00a \
 -C cpu.CCSIDR-L1I_override=0x201fe012 \
 -C cpu.CCSIDR-L2_override=0x70ffe07a \
 -C cpu.cpu0.vfp-enable_at_reset=1 \
 -C cpu.cpu0.CONFIG64=0 \
 -C cpu.cpu0.cti-number_of_claim_bits=0x8 \
 -C cpu.cpu0.enable_crc32=0x1 \
 -C cpu.cpu0.MPIDR-override=0x80000000 \
 -C cpu.cpu0.number-of-breakpoints=0x6 \
 -C cpu.cpu0.number-of-context-breakpoints=0x2 \
 -C cpu.cpu0.number-of-watchpoints=0x4 \
 -C cpu.cpu0.RVBAR=0x2000000  \
 -C cpu.cpu0.RVBAR=0x2000000 \
 -C cpu.cpu1.CONFIG64=1 \
 -C cpu.cpu1.cti-number_of_claim_bits=0x8 \
 -C cpu.cpu1.enable_crc32=0x1 \
 -C cpu.cpu1.MPIDR-override=0x80000001 \
 -C cpu.cpu1.number-of-breakpoints=0x6 \
 -C cpu.cpu1.number-of-context-breakpoints=0x2 \
 -C cpu.cpu1.number-of-watchpoints=0x4 \
 -C cpu.cpu1.RVBAR=0x2000000  \
 -C cpu.cpu2.CONFIG64=1 \
 -C cpu.cpu2.cti-number_of_claim_bits=0x8 \
 -C cpu.cpu2.MPIDR-override=0x80000002 \
 -C cpu.cpu2.number-of-breakpoints=0x6 \
 -C cpu.cpu2.number-of-context-breakpoints=0x2 \
 -C cpu.cpu2.number-of-watchpoints=0x4 \
 -C cpu.cpu2.RVBAR=0x2000000  \
 -C cpu.cpu3.CONFIG64=1 \
 -C cpu.cpu3.cti-number_of_claim_bits=0x8 \
 -C cpu.cpu3.enable_crc32=0x1 \
 -C cpu.cpu3.MPIDR-override=0x80000003 \
 -C cpu.cpu3.number-of-breakpoints=0x6 \
 -C cpu.cpu3.number-of-context-breakpoints=0x2 \
 -C cpu.cpu3.number-of-watchpoints=0x4 \
 -C cpu.cpu3.RVBAR=0x2000000   \
 -C cpu.CTIPIDR=0x4000bbd0f \
 -C cpu.CTR-L1Ip-override=0x3 \
 -C cpu.dbgitr_buffer_size=0x20  \
 -C cpu.DBGPIDR=0x4000bbd0f \
 -C cpu.error_record_feature_register='{"ED":0x0, "UI":0x0, "FI":0x0, "UE":0x0, "CFI":0x0, "CEC":0x0, "RP":0x0, "DUI":0x0, "CEO":0x0, "CI":0x0}' \
 -C cpu.exercise_stxr_fail=1 \
 -C cpu.ext_abort_normal_cacheable_write_is_sync=1 \
 -C cpu.ext_abort_normal_noncacheable_write_is_sync=1 \
 -C cpu.ext_abort_so_read_is_sync=0 \
 -C cpu.fpcr_short_vector_raz=1 \
 -C cpu.gic.GICH-offset=0x10000 \
 -C cpu.gic.GICV-offset=0x20000 \
 -C cpu.gic.PERIPH-size=0x40000  \
 -C cpu.gicv3.dir-trap-support=0 \
 -C cpu.gicv3.IIDR_base=0x4043b \
 -C cpu.has_16bit_vmids=0x2 \
 -C cpu.has_arm_v8-1=1 \
 -C cpu.has_arm_v8-2=1 \
 -C cpu.has_complex_number=0x2 \
 -C cpu.has_complex_number=0x2 \
 -C cpu.has_delayed_dbgreg=1 \
 -C cpu.has_delayed_sysreg=1 \
 -C cpu.has_fp16=0x2 \
 -C cpu.has_hardware_translation_table_update=0x0 \
 -C cpu.has_large_system_ext=1 \
 -C cpu.has_large_va=0x1 \
 -C cpu.has_pstate_pan=0x2 \
 -C cpu.has_ras=0x1  \
 -C cpu.has_rounding_doubling_multiply_add_subtract=0x2 \
 -C cpu.has_stage2_xnx=0x2 \
 -C cpu.has_statistical_profiling=0 \
 -C cpu.has_tlb_conflict_abort=1 \
 -C cpu.icache-log2linelen=0x6 \
 -C cpu.icache-size=0xc000 \
 -C cpu.icache-ways=0x3 \
 -C cpu.instruction_tlb_size=0xffffffff \
 -C cpu.l2cache-size=0x200000 \
 -C cpu.max_32bit_el=0x3 \
 -C cpu.MIDR=0x701f6620 \
 -C cpu.pmu_has_chain_event=0 \
 -C cpu.PMUPIDR=0x4000bbd0f \
 -C cpu.scheduler_mode=1 \
 -C cpu.stage12_tlb_size=0xffffffff \
 -C cpu.stage1_tlb_size=0xffffffff \
 -C cpu.stage2_tlb_size=0xffffffff \
 -C cpu.take_ccfail_tsc_trap=1 \
 -C cpu.unpred_edscr_rw_unknown_bits_read_as_1=1  \
 -C cpu.unpred_tsize_aborts=1  \
 -C cpu.use_tlb_contig_hint=1 \
 -C enable-gicv3=1 \
 -C gic_distributor.direct-lpi-support=1 \
 -C gic_distributor.DPG-bits-implemented=1 \
 -C gic_distributor.GICD-alias=0x2c160000 \
 -C gic_distributor.GICD_PIDR=0x44004bb492 \
 -C gic_distributor.GICR_PIDR=0x44004bb493 \
 -C gic_distributor.GITS_BASER0-type=0x1 \
 -C gic_distributor.GITS_BASER1-type=0x4 \
 -C gic_distributor.GITS_BASER2-type=0x2 \
 -C gic_distributor.GITS_PIDR=0x44004bb494 \
 -C gic_distributor.ITS-count=0x2 \
 -C gic_distributor.ITS-cumulative-collection-tables=0 \
 -C gic_distributor.ITS-device-bits=0x6 \
 -C gic_distributor.ITS-hardware-collection-count=0x3 \
 -C gic_distributor.ITS0-base=0x2c120000 \
 -C gic_distributor.ITS1-base=0x2c140000 \
 -C gic_distributor.reg-base-per-redistributor="0.0.0.0=0x2c020000, 0.0.0.1=0x2c060000, 0.0.0.2=0x2c0a0000, 0.0.0.3=0x2c0e0000" \
 -C gic_distributor.virtual-lpi-support=1 \
 -C gicv3.CPU-affinities="0.0.0.0, 0.0.0.1, 0.0.0.2, 0.0.0.3" \
 -C ram_fill_pattern_1=0x5a5a5a5a \
 -C ram_fill_pattern_2=0x3c3c3c3c \
 -C SVE.ScalableVectorExtension.enable_at_reset=1 \
 -C SVE.ScalableVectorExtension.fp_exception_set_vecitr=1 \
 -C SVE.ScalableVectorExtension.support_npot_vl=0 \
 -C SVE.ScalableVectorExtension.veclen=0x4 \
 -C cpu.cpu2.enable_crc32=0x1 \
 -C cpu.has_aarch32_hpd=1 \
  $*

 # -C SVE.ScalableVectorExtension.veclen=0x4 \

